Common data processing methods of integrated circuit reliability test

Date：2022-04-24 15:02:08Views：765

As the core of information industry, integrated circuit industry is a strategic, basic and leading industry to support economic and social development and ensure national security. The volume of VLSI marked by silicon-based monolithic digital continues to shrink, and the circuit structure and manufacturing process are becoming more and more complicated. Its reliability is also affected by process errors and related factors. Reliability engineering must use the current modern science and technology, systematically consider the product function, use special technical means, reduce the product failure rate, and finally ensure the good operation of the system. In the wafer level reliability test of integrated circuits, the most common test categories are thermal current injection test, electromigration test and other related test items.

Gate oxide testing technology and data processing method

In the process of manufacturing integrated circuits, gate oxide plays a key role. With the continuous expansion of the scale of integrated circuits, its thickness is also increasing. At the same time, the thickness against the decreasing volume of devices is also decreasing. Because of the key position of gate oxide, its reliability has also received great attention. Among the problems encountered, the more common are the dielectric penetration and defect density of gate oxide. The reliability test of gate oxide is generally carried out by taking the contact medium as the object to carry out slope voltage test and puncture test at the same time node.

1. Ramp voltage test

In the reliability test, the ramp voltage test is to add the linear ramp voltage to the gate until the voltage breaks through the oxide layer. Different from the ramp voltage test, the ramp current test is to add a certain exponential ramp current on the grid until the oxide layer is broken down. Both methods measure the defect density of gate oxide. For example, in general, the test of ramp voltage is carried out within a certain voltage standard. If the voltage when the voltage breaks through the oxide layer is smaller than the set voltage standard, it can be considered that there are defects in the oxide layer, and it can be further confirmed that the oxide layer is invalid. In jesd35 standard, the yield formula based on Poisson distribution can calculate the corresponding defect density: y = e-doa, where the yield is expressed by Y, that is, the ratio of effective sample to total test sample, the area of tested sample is expressed by a, and the defect density is expressed by do. After a large number of tests of slope current and voltage, the yield value can be obtained through calculation, and the defect density can be calculated by using the test sample area. Once the defect density is inconsistent with the setting standard, the test is deemed to have failed.

2. Experiment of dielectric breakdown

Time dependent dielectric breakdown is also a dielectric breakdown experiment. The test steps are as follows: add the intrinsic smaller than the gate oxide layer to the gate, which can not lead to intrinsic breakdown, but the oxide layer has certain defects in the process of personal leave of electrical stress. In this case, the breakdown phenomenon will appear after a period of time. In the process of evaluating the reliability test of integrated circuits, the breakdown of shed oxygen medium at the same time is the main limiting factor. Generally speaking, the breakdown phenomenon occurs only when the silicon oxide electric field exceeds the limit and the charge accumulation reaction is caused by too high current. At present, the breakdown of oxide layer is mainly divided into two stages: Construction wear and breakdown. In the construction wear stage, the defects in the silica interface under the operation of electrical stress will continue to accumulate. When the equivalent change causes the mass, some defects will first reach the critical value and enter the breakdown stage, and quickly breakdown the oxide layer based on the double reaction of electric heating. Therefore, the time and period of the breakdown test of the shed oxide layer are determined by the duration of the first stage.

Hot carrier injection technology and data processing

1. Hot carrier injection test

In IC reliability testing, the main function of wafer level detection is to detect special carrier injection. Hot carrier detection is carried out by using zoom Fermi level and actual quantity. In integrated circuit components, the carrier leakage limit caused by the omission of over-source voltage is mainly because when the carrier flows into a large electric field range around the omission of large electric field strength, the high-energy quantum will turn to hot carrier. At the same time, the impact of electrons makes the electron holes generated by hot carriers generate electricity more deeply.

2. Data processing

In the integrated construction, the data processing method and all detection stages of hot carriers are clearly specified according to relevant requirements. For example, 1.8V is the working voltage of MOS tube, and the stress voltage range is 2-3v. Under normal conditions, the special power function is combined with the value of time variation. Usually, after hot carrier detection, it is necessary to calculate the electrical value change according to the predetermined parameters, and then obtain the predetermined time and parameters.

Electromigration test and processing method

The electromigration of metal interconnects usually changes according to the expansion speed of the integration scale, the volume of its integrated devices is shrinking, and the current density of household connections is increasing. It gradually occupies a very key position in the electromigration test. In the physical phenomenon, the detailed expression of electromigration phenomenon in integrated circuit is that in the process of actual production and experiment of different devices of integrated circuit, some currents in the interconnection between metals pass through, and the metal cations will transmit electrons according to the quality of the conductor, which can make some spaces of the conductor appear different physical phenomena such as cavities and hills. Electromigration phenomena in integrated circuits are mostly carried out under the influence and action of "strong electron wind" in practice. When electrons flow from the negative pole to the positive pole of the power supply, they will be subject to certain energy collision. The metal cation can move continuously first to the positive pole, while the negative pole will produce some empty acupoints. In this process, they will increase and accumulate continuously, which can make the metal form a short circuit, At the same time, the whisker phenomenon occurs due to the accumulation of metal ions in the positive electrode, and there is a very high probability that the surrounding metal wires will be short circuited.

In the experiments and tests of electromigration, we often let the samples conduct constant accelerated physical test experiments under different pressure and temperature conditions. This is often the reason that the stress test during acceleration should not change the failure mechanism of the device. The lognormal distribution and logarithmic standard deviation under different stress conditions at normal level are often equal. With the service life data of different samples under different stress conditions, the median life under the same stress can be obtained according to the estimation method and standard of lognormal distribution, and then the actual situation of electromigration life distribution under normal conditions can be obtained by using the physical model of accelerated motion, and then the preliminary judgment of service life under different cumulative failure rates can be obtained.

I believe that by reading the above content, we have a deeper understanding of IC reliability test data processing. This article is introduced here. I hope it can be helpful to you. We will bring more wonderful content in the later stage. The company's testing services cover: electronic component testing and verification, IC authenticity identification, product design and material selection, failure analysis, function testing, factory incoming material inspection, tape braiding and other testing items. Welcome to call Chuangxin testing. We will serve you wholeheartedly.